Minimum qualifications:
- Bachelor's degree in Electronic Engineering or Computer Engineering, or equivalent practical experience.
- Experience in embedded code development (e.g., C/C++).
Preferred qualifications:
- Experience in DDR compliance measurements using high-end equipment (e.g., Oscilloscope, logic).
- Experience with development in pre-silicon tools (e.g., Field Programmable Gate Array (FPGA), Emulator).
- Knowledge of MC and DDR domain, system aspects, performance optimization, silicon bring-up, functional validation, and debug.
- Knowledge of ARM based SoC architecture (e.g., Boot flow, memory allocation, etc.).
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Take overall ownership of the Double Data Rate (DDR) controller validation, focusing on functional and performance validation.
- Develop silicon validation drivers and tests to validate blocks functionality, integrated debug hooks, and performance monitors.
- Support system ramp in debugging, integration of new dual in-line memory module (DIMM) vendors, and triage for Memory Controller (MC) related failures.
